An Efficient, High-Performance DSP Architecture for W-CDMA Receivers

The Cadence Tensilica ConnX DSP family based on the Xtensa® customizable processor is specifically designed for wireless communication modem (PHY layer 1) systems. Cadence has worked closely with customers and software PHY companies that create wireless communication algorithms to drive product development. The Xtensa customizable processor gives modem developers a powerful starting point for system development. You can choose to add instructions to the base instruction set architecture (ISA) from pre-defined options or create your own using the Tensilica Instruction Extension (TIE) language. The processor is optimized with an automated flow that requires no extra processor verification and keeps the development tools updated with every change. This automated process guarantees your new processor is correct-by-construction.